As known, a LCD panel comprises a color-filtering substrate, a liquid crystal layer and a thin film transistor (TFT) substrate. The liquid crystal layer is arranged between the color-filtering substrate and the TFT substrate.
FIG. 1 is a schematic diagram illustrating a TFT substrate of a LCD panel according to the prior art. As shown in FIG. 1, the TFT substrate 100 of a LCD panel comprises a visible zone 110 and an invisible zone 120. The visible zone 110 includes the region circumscribed by a dashed line, and the invisible zone 120 includes the region that is not circumscribed by the dashed line. The visible zone 110 includes an active-matrix array. The active-matrix array comprises plural gate lines G1˜Gn. In addition, plural gate input pads 131˜13n are formed on an edge of the TFT substrate 100. Through the layout trace of the invisible zone 120, the gate lines G1˜Gn are connected with corresponding gate input pads 131˜13n, respectively. Moreover, the gate input pads 131˜13n are connected with a gate driver 180 through a flexible cable 140. Consequently, the gate driving signals outputted from the gate driver 180 can be transmitted to all of the gate lines G1˜Gn of the visible zone 110 for turning on pixels (not shown) of the active-matrix array. The TFT substrate 100 further includes other kinds of input pads such as a TFT substrate common voltage input pad Vcom_A and a color-filtering substrate common voltage input pad Vcom_CF for providing common voltages to the TFT substrate and the color-filtering substrate, respectively.
As known, the active-matrix array further comprises plural source lines, which are connected with an external source driver for receiving data signals. For clarification and brevity, the source lines are not shown in FIG. 1.
For fabricating the conventional LCD panel, it is necessary to perform a polymer stabilized alignment (PSA) process. After the PSA process is done, the liquid crystal molecules within the liquid crystal layer of the LCD panel are aligned in a specified direction. Consequently, the LCD panel has many advantages such as high brightness, high contrast ratio and fast response time.
Moreover, during the PSA process is performed, a specified voltage is simultaneously provided to all of the gate lines G1˜Gn, and heat energy or a UV ray is provided to the liquid crystal layer. In such way, the liquid crystal molecules are aligned in the specified direction. Of course, the specified voltage may be simultaneously provided to the TFT substrate common voltage input pad Vcom_A and the color-filtering substrate common voltage input pad Vcom_CF.
FIG. 2 is a schematic diagram illustrating the LCD panel produced after the conventional PSA process is done. Like FIG. 1, the TFT substrate 100 of FIG. 2 also comprises a visible zone 110 and an invisible zone 120, wherein the visible zone 110 includes the region circumscribed by a dashed line, and the invisible zone 120 includes the region that is not circumscribed by the dashed line. For providing a constant voltage to all of the gate lines G1˜Gn, the TFT substrate common voltage input pad Vcom_A and the color-filtering substrate common voltage input pad Vcom_CF during the PSA process is performed, TFT substrate 100 of FIG. 2 further comprises a slicing zone 150. The gate input pads 131˜13n are partially or completely connected with each other through the layout trace of the slicing zone 150. In addition, the TFT substrate common voltage input pad Vcom_A and the color-filtering substrate common voltage input pad Vcom_CF are also connected with the gate input pads 131˜13n through the layout trace of the slicing zone 150.
In other words, during the PSA process is performed, if the specified voltage is provided to any input pad, the specified voltage may be provided to all of the gate lines G1˜Gn, the TFT substrate common voltage input pad Vcom_A and the color-filtering substrate common voltage input pad Vcom_CF. In addition, after the heat energy or UV ray is provided to the liquid crystal layer, the liquid crystal molecules are aligned in the specified direction.
After the PSA process is completed, the slicing zone 150 is cut off by a laser cutting technology. Meanwhile, the gate lines G1˜Gn, the TFT substrate common voltage input pad Vcom_A and the color-filtering substrate common voltage input pad Vcom_CF are no longer connected with each other. Afterwards, the gate input pads 131˜13n will be connected with the gate driver through the flexible cable.
Recently, for reducing the fabricating cost of the LCD panel, the gate driver may be directly formed on the TFT substrate to define a gate driver on array substrate (GOA substrate). Since the gate driver is directly formed on the TFT substrate, it is not necessary for the manufacturer to additional purchase the gate driver and the flexible cable.
FIG. 3 is a schematic diagram illustrating a GOA substrate of a conventional LCD panel. The GOA substrate 300 of the conventional LCD panel comprises a visible zone 310 and an invisible zone 320, wherein the visible zone 310 includes the region circumscribed by a dashed line, and the invisible zone 320 includes the region that is not circumscribed by the dashed line. The visible zone 310 includes an active-matrix array. The active-matrix array comprises plural gate lines G1˜Gn. The invisible zone 320 of the GOA substrate 300 further comprises a gate driver 360. The gate driver 360 comprises a shift register 365. The output terminals of the shift register 365 are successively connected with corresponding gate lines G1˜Gn through the layout trace. Consequently, the gate driving signals outputted from the shift register 365 can be transmitted to all of the gate lines G1˜Gn of the visible zone 310 for turning on pixels (not shown) of the active-matrix array. The GOA substrate 300 further includes other kinds of input pads such as a TFT substrate common voltage input pad Vcom_A and a color-filtering substrate common voltage input pad Vcom_CF for providing common voltages to the TFT substrate and the color-filtering substrate, respectively. The active-matrix array further comprises plural source lines, which are connected with an external source driver (not shown) for receiving data signals.
However, the polymer stabilized alignment (PSA) process of the GOA substrate 300 incurs some difficulties. For example, since the gate lines G1˜Gn are directly connected with the shift register 365 of the gate driver 360, the conventional GOA substrate 300 fails to be implemented by the method of FIG. 2, which includes the steps of connecting the gate lines G1˜Gn to any input pad, providing the specified voltage to the input pad, and disconnecting the gate lines G1˜Gn from each other after the PSA process is done.
In a case that the specified voltage fails to be simultaneously received by the gate lines G1˜Gn, the active-matrix array of the visible zone may be suffered from so-called Mura defects. Due to the Mura defects, the product yield of the LCD panel is largely reduced.